MAX5965AEAX+【PDF 24/54 页】IC PSE CTRLR FOR POE 36SSOP

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Sheet目录43

20页 21页 22页 23页 [24页]25页 26页 27页 28页

High-Power, Quad, Monolithic, PSE Controllers

for Power over Ethernet

24 ______________________________________________________________________________________

Watchdog

The R1Eh and R1Fh registers control the watchdog

operation. The watchdog function, when enabled, allows

the MAX5965A/MAX5965B to gracefully take over con-

trol or securely shuts down the power to the ports in

case of software/firmware crashes. Contact the factory

for more details.

Address Inputs

A3, A2, A1, and A0 represent the 4 LSBs of the chip

address. The complete chip address is 7 bits (see

Table 4).

The 4 LSBs latch on the low-to-high transition of RESET or

after a power-supply start (either on V

or V

). Address

inputs default high through an internal 50k& pullup resistor

to V

. The MAX5965A/MAX5965B also respond to the

call through a global address 30h (see the Global

Addressing and Alert Response Protocol section).

C-Compatible Serial Interface

The MAX5965A/MAX5965B operate as a slave that

sends and receives data through an I

C-compatible, 2-

wire or 3-wire interface. The interface uses a serial-data

input line (SDAIN), a serial-data output line (SDAOUT),

and a serial-clock line (SCL) to achieve bidirectional

communication between master(s) and slave(s). A mas-

ter (typically a microcontroller) initiates all data transfers

to and from the MAX5965A/MAX5965B, and generates

the SCL clock that synchronizes the data transfer. In

most applications, connect the SDAIN and the SDAOUT

lines together to form the serial-data line (SDA).

Using the separate input and output data lines allows

optocoupling with the controller bus when an isolated

supply powers the microcontroller.

The MAX5965A/MAX5965B SDAIN line operates as an

input. The MAX5965A/MAX5965B SDAOUT operates as

an open-drain output. A pullup resistor, typically 4.7k&,

is required on SDAOUT. The MAX5965A/MAX5965B SCL

line operates only as an input. A pullup resistor, typically

4.7k&, is required on SCL if there are multiple masters,

or if the master in a single-master system has an open-

drain SCL output.

R/W

Table 4. MAX5965A/MAX5965B Address

Figure 4. 2-Wire, Serial-Interface Timing Details

SCL

SDAIN

LOW

HIGH

BUF

START

CONDITION

STOP

CONDITION

REPEATED START CONDITION

START CONDITION

HD, STA

SU, DAT

HD, DAT

SU, STA

HD, STA

SU, STO

Figure 5. 3-Wire, Serial-Interface Timing Details

SCL

SDAIN/SDA

LOW

HIGH

BUF

START

CONDITION

STOP

CONDITION

REPEATED START CONDITION

START CONDITION

HD, STA

SU, DAT

HD, DAT

SU, STA

HD, STA

SU, STO

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